1. Field of the Invention
The present invention relates to a solid-state imaging device and an electronic apparatus including the solid-state imaging device.
2. Description of the Related Art
The solid-state imaging device is largely divided into a charge-transfer type solid-state imaging device typified by a CCD (Charge Coupled Device) image sensor and an amplification-type solid-state imaging device typified by a MOS-type image sensor such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor. When comparing the CCD image sensor with the MOS-type image sensor, high drive voltage is necessary for transferring signal charges in the CCD image sensor, therefore, it is inevitable that power supply voltage becomes high as compared with the MOS-type image sensor.
Accordingly, as a solid-state imaging device loaded on mobile equipment such as a cellular phone with a camera or a PDA (Personal Digital Assistant) in recent years, the MOS-type image sensor is used in various applications, in which power supply voltage is lower than the CCD image sensor and advantageous as compared with the CCD image sensor from the viewpoint of power consumption and the like.
In the MOS-type image sensor, a unit pixel includes a photodiode which is a photoelectric conversion portion and plural MOS transistors, and the MOS-type image sensor is formed by including an imaging region in which plural unit pixels are arranged in an array and a peripheral circuit region.
FIG. 15 shows a relevant part of a charge readout portion of a pixel in a common MOS-type image sensor. In the pixel, a photodiode 102 to be a photoelectric conversion portion and an n-type semiconductor region, namely, a floating diffusion region 103 to which signal charges of the photodiode 102 are read are formed on a semiconductor substrate 101. Between the photodiode 102 and a floating diffusion region 103, a transfer transistor Tr1 in which a gate electrode (so-called transfer gate electrode) 105 is formed through a gate insulating film 104 is formed, where a charge readout portion is formed.
The photodiode 102 is constructed as a buried photodiode including an n-type semiconductor region 107 to be a charge accumulation region and a p-type semiconductor region, a so-called p-type accumulation layer 108 formed at an interface portion at the surface thereof. The photodiode 102 is constructed as a so-called HAD (Hole Accumulation Diode) sensor. At a sidewall of the gate electrode 105, a side wall 106 made by an insulation layer is formed.
During a charge accumulation period, 0V is applied to the gate electrode 105 to allow the transfer transistor Tr1 to be in OFF-state, thereby accumulating signal charges in the photodiode 102. At the time of readout, positive voltage is applied to the gate electrode 105 to transfer signal charges accumulated in the photodiode 102 to the floating diffusion region 103.
In the photodiode 102, signal charges according to the incident light amount and dark current components (dark electrons) flowing into the photodiode 102 even when light is not incident are accumulated during the charge accumulation period. The dark electrons are electrons generated from an interface between the insulating film and the silicon region under the gate electrode 105, which will be fixed pattern noise to be a cause of generating white spots.
As a technique for improving the above problem, a MOS image sensor which reduces dark current by applying negative voltage to the gate electrode of the transfer transistor during the charge accumulation period which is disclosed in JP-A-2002-217397 (Patent Document 1) is proposed. The MOS image sensor has a configuration in which a negative voltage −V is applied to the gate electrode 105 of the transfer transistor Tr1 during the charge accumulation period as shown in FIG. 16. In the configuration, holes (positive holes) “h” are induced just under the gate electrode 105 to allow the transfer transistor Tr1 to be in OFF state by applying the negative voltage -V to the gate electrode 105, and holes “h” are also induced just under the sidewall 106 in the vicinity of the gate electrode 105 by fringe capacitance at the same time. That is, a hole pinning mode is generated electrically just under the gate electrode 105 and just under the sidewall 106 in the vicinity of the gate electrode 105. According to this, electrons generated from the interface between the gate insulating film 104 as well as the sidewall 106 in the vicinity thereof and the silicon region are made to be coupled again with the holes “h” to thereby suppress white spots.
Additionally, a MOS image sensor is proposed in JP-A-2006-32681 (Patent Document 2), in which the gate electrode of the transfer transistor is made of p-type polysilicon which has the work function difference with respect to an intrinsic semiconductor to suppress generation of dark current from the interface of the transfer transistor even when negative voltage is not introduced.
In the case that signal charges in the photodiode 102 are read to the floating diffusion region 103, when the p-type accumulation layer 108 comes close to the gate electrode 105, a readout voltage Vtg of the transfer transistor Tr1 becomes high, therefore, it becomes difficult to read signal charges. FIG. 3C shows a potential distribution before reading signal charges and a potential distribution at the time of readout. In the configuration of the normal charge readout portion in FIG. 15, a potential “a” before readout is modulated by applying a readout voltage to the gate electrode 105 of the transfer transistor Tr1 to thereby read signal charges in the photodiode 102. At this time, when the readout voltage is low, a potential barrier “c” is formed just under the sidewall 106 as shown in FIG. 3C, as a result, it is difficult to read signal charges. In order to make the readout of signal charges easy, readout voltage which is sufficiently high to break the potential barrier “c” is necessary. FIG. 3A corresponds to a readout portion in a related art example.
In the MOS solid-state imaging device, improvement of readout characteristics is expected in recent years.
In order to make the readout of signal charges easy, it is considered that the high-concentration p-type accumulation layer 108 is kept away from the gate electrode 105, however, it induces white spots. When the p-type accumulation layer 108 is closed to the gate electrode 105 to suppress generation of white spots, the readout voltage becomes high. To improve readout characteristics and to suppress generation of white spots contradict to each other.
Considering relation between readout characteristics and a saturated charge amount (maximum handling charge amount) Qs of the photodiode, when the concentration of the n-type semiconductor region of the photodiode is high, Qs becomes high, however, it is difficult to read signal charges. When the concentration of the n-type semiconductor region is made high, the increase of white spots is induced.